Junction field effect transistors (JFETs) are majority carrier devices that conduct current through a channel that is controlled by the application of a voltage to a p-n junction. JFETs may be constructed as p-channel or n-channel and may be operated as enhancement mode devices or depletion mode devices.
The most common JFET type is the depletion mode type. The depletion mode device is a normally “on” device that is turned off by reverse biasing the p-n junction so that pinch-off occurs in the conduction channel. P-channel depletion mode devices are turned off by the application of a positive voltage between the gate and source (positive Vgs), whereas n-channel depletion mode devices are turned off by the application of a negative voltage between the gate and source (negative Vgs). Since the junction of a depletion mode JFET is reverse biased in normal operation, the input voltage Vgs can be relatively high. However, the supply voltage between the drain and source (Vds) is usually relatively low when the device is switched on.
Enhancement mode, or normally “off” JFETs are characterized by a channel that is sufficiently narrow such that a depletion region at zero applied voltage extends across the entire width of the channel. Application of a forward bias reduces the width of the depletion region in the channel, thereby creating a conduction path in the channel. P-channel enhancement mode JFETs are turned on by the application of a negative Vgs, and n-channel enhancement mode JFETs are turned on by the application of a positive Vgs. The input voltage of an enhancement mode JFET is limited by the forward breakdown voltage of the p-n junction.
Historically, high voltage applications for transistors have relied chiefly on bipolar junction transistors (BJTs), insulated gate bipolar transistors (IGBTs), and metal oxide semiconductor field effect transistors (MOSFETs). IGBTs and MOSFETs have the disadvantage of being susceptible to gate damage due to static discharge, and BJTs are susceptible to thermal runaway. JFETs do not have these disadvantages. JFETs share the transconductance/temperature behavior of MOSFETs, but they do not rely on an insulated gate.
In the fabrication of silicon electronic devices such as JFETs and MOSFETs, trenches may be etched that require a subsequent fill with a dielectric material. Silicon dioxide is commonly used for trench fill, but there are some disadvantages. As smaller critical dimensions are adopted for the fabrication of silicon electronic devices, thinner layers and finer registration are required, and devices are less tolerant of defects.
With typical oxide deposition processes, voids occasionally form in the region of a filled trench. These voids may form as a result of trench geometry or the characteristics of the oxide deposition process.
Another problem with conventional oxide fills is the difficulty in avoiding the unwanted removal of oxide during subsequent etchback. Unwanted material removal may be the result of over-etching in the vertical dimension or may result from poor lateral registration during an etch step. Shallow trenches are particularly susceptible, since a given amount of over-etching will constitute a greater fraction of the fill. The problem of over-etching of an oxide trench fill may be compounded by a subsequent metal deposition step, resulting in a substitution of metal for a portion of the dielectric oxide fill.
Thus, a need exists for a trench fill method that is capable of reducing the formation of voids in the vicinity of the trench. There is also a need for a trench fill method that protects against oxide over-etching, particularly for shallow trenches.